An EG LDPC Based 2 Dimensional Error Correcting Code forMitigating MBUs of SRAM Memories

ÇAVUŞ E., Erozan A.

FPGA World Conference, Stockholm, Sweden, 8 - 10 September 2015

  • Publication Type: Conference Paper / Full Text
  • City: Stockholm
  • Country: Sweden
  • Ankara Yıldırım Beyazıt University Affiliated: Yes