Computationally efficient decoding of LDPC codes


Cavus E. , Daneshrad B.

Electronics Letters, vol.45, no.18, pp.946-948, 2009 (Journal Indexed in SCI Expanded) identifier

  • Publication Type: Article / Article
  • Volume: 45 Issue: 18
  • Publication Date: 2009
  • Doi Number: 10.1049/el.2009.1338
  • Title of Journal : Electronics Letters
  • Page Numbers: pp.946-948

Abstract

A computationally efficient algorithm for the decoding of low-density parity check codes is introduced. Instead of updating all bit and check nodes at each decoding iteration, the developed algorithm only updates unreliable check and bit nodes. A simple reliability criteria is developed to determine the active bit and check nodes per decoding iteration. Based on the developed technique, significant computation reductions are achieved with very little or no loss in the BER performance of the LDPC codes. The proposed method can be implemented with a slight modification to the sum-product algorithm with negligible additional hardware complexity. © The Institution of Engineering and Technology.