Multiplier-Free PoT Block-BiLSTM Channel Equalizer in Tactical Communications


Creative Commons License

Aydın E. M., Tokluoğlu O., Çavuş E.

2026 34th Signal Processing and Communications Applications Conference (SIU), İstanbul, Türkiye, 7 - 10 Temmuz 2026, ss.1-4, (Tam Metin Bildiri)

Özet

n this paper, a multiplier-free Block Bidirectional LSTM (Block-BiLSTM) equalizer is proposed to mitigate the combined effects of Power Amplifier (PA) nonlinearity and multipath fading in tactical radio systems. All weights are constrained to a 4-bit Power-of-Two (PoT) set, converting floating-point multiplications into bit-shift and addition operations, thereby completely eliminating DSP block usage on FPGA or ASIC platforms. Trained under Quantization-Aware Training using the Straight-Through Estimator, the proposed PoT Block-BiLSTM exhibits equivalent performance to the floating-point baseline across all SNR points under a PA soft-clipping channel with a 1.2 threshold, 32 hidden units, four-tap multipath, and BPSK modulation. Furthermore, it completely eliminates all 220 DSP48E1 blocks on the xc7z020 capacity, reducing dynamic power consumption from 1.041 W to 0.195 W (a 5.3x reduction) and total power consumption from 1.162 W to 0.300 W, ensuring high energy efficiency for constrained devices.